Implementation of an Area and Delay Efficient Fixed Fir Filter Using Multiple Constant Multiplications (mcm) Technique

Multiple Constant Multiplications (MCM) are widely used for implementing transpose form pipelined Finite Impulse Response (FIR) filters. In biomedical applications like Electro Cardio Gram (ECG) the coefficients of FIR filters remain fixed. In these applications, Full flexibility of a multiplier is not necessary. Once the MCM method is implemented, it can be called as many times if needed. Transpose form block FIR filter depends on MCM based architecture for fixed FIR filter. Adders play an important role in Digital Signal Processing. In this paper, two different types of adders are used in Pipelined Adder Unit (PAU) for better area and delay realization. Performance comparisons results show that FFIR filter using Ripple Carry Adders (RCA) has a less Area Delay Product (ADP) when compared with FFIR filter using Carry Select Adder (CSLA). Implementation of Fixed FIR filter using MCM is done using VerilogHDL and synthesized using Xilinx 12.2 synthesis tool and ISIM simulator.